Scheduling and supervisory control
Scheduling and supervisory control techniques are essential to realize correct system operation and optimize performance in relation to other system-level concerns like product quality and accuracy. They need to be designed during system development but, often, schedules and control strategies can only be computed during system operation because only then are the full operating conditions and all system inputs known. Such on-line computations need to be done within strict time budgets and with the often limited processing resources available during system operation.
We identify three best practices related to scheduling and supervisory control. Based on models of system behavior, (template code for) schedulers and controllers can be synthesized. Those schedulers and controllers should optimize performance at runtime for varying system configurations and operating conditions. Runtime performance optimization through scheduling and control needs to account for various factors as well as the specific workloads being processed by the system. It also needs to deal with model-driven quality and resource management to cope with configuration and operational changes in general. Furthermore, it must consider the impact of control choices on all relevant system qualities and resources. Schedulers and controllers should guarantee performance by construction. For instance, a scheduler may guarantee a minimum productivity under varying operating conditions. Another example is a controller that minimizes energy usage at runtime taking into account operational information on energy usage while ensuring that the expected number of missed deadlines does not exceed 2%.
Model-Based Systems Engineering for Industrial Cyber-Physical Systems
M. Hendriks, R. Doornbos, J. Voeten, T. Basten, H. Ara, J. Kandelaars, J. van Pinxten, E. Schindler
In preparation.
Partial-Order Reduction for Supervisory Controller Synthesis
Parametric Scheduler Characterization
Communication Aware Multiprocessor Binding for Shared Memory Systems
11th IEEE International Symposium, SIES 2016